1. FIELD OF THE INVENTION
The present invention relates to integrated circuits. More particularly, the present invention relates to a family of micropower masked read-only-memory integrated circuits.
2. BACKGROUND ART
The present invention is similar in form and function to commercially available masked read-only-memories, except for the provision of extremely lower level of power consumption. At the present time, many low-power components found in existing product lines are being made obsolete by vendors at an alarming rate. This action results in the substitution of functionally equivalent but much higher power requirement parts. Since the transmitter's maximum power consumption is a fixed value, the necessary power levels must be obtained by reducing the power consumption of other devices or by major architectural changes. Consequently, a read-only-memory requiring only ultra-low power consumption would provide an attractive alternative to the user.
A significant number of read-only-memory masked integrated circuits are available from a wide variety of domestic and international vendors. Information pertaining to and describing these devices can be found primarily in the associated data books provided by the vendors. Detailed power consumption data for some of these devices has been reviewed and the tabulation has resulted in the development of the present design for a low-power integrated circuit. It has been noted that the commercially available masked read-only-memories as presently utilized in the prior art utilize a single memory array to achieve high speed and maximum bit density.